Innovation... driven by intelligence and logic

I2C Device Driver

Abstract:

The I2C bus was designed by Philips in the early '80s to allow easy communication between components which reside on the same circuit board .The I2C (Inter-Integrated Circuit) Bus is a two-wire, low to medium speed, communication bus (a path for electronic signals) . I2C was created to reduce the manufacturing costs of electronic products. It provides a low-cost, but

powerful, chip-to-chip communication link . Initial applications for I2C included volume and contrast control in radios and televisions. Over the past decade, I2C has expanded its communications role to include a wide range of applications. Today, I2C can be found in a wide variety of computer, industrial, entertainment, medical, and military systems, with almost unlimited growth potential.

Introduction:

I2C performs chip-to-chip communications using only two wires in a serial interface, allowing ICs to communicate with fewer pins. The two wires in the I2C Bus are called Clock (SCL) and

Data (SDA). These two wires carry addressing, selection, control, and data, one bit at a time. The SDA wire carries the data, while the SCL wire synchronizes the sender and receiver during the transfer. ICs that use the I2C Bus can perform the same function as their larger parallel interface counterparts, but with far fewer pins. This greatly reduces the size and cost of Ics based on the I2C Bus.

Each device in I2C system has its own 7-bit address. It can act as a master or as a slave during a data transfer. A master is the device that initiates the data transfer and generates the clock signals needed for the transfer. At that time any addressed device is considered a slave. The I2C bus is a multi-master bus. This means that more than one device is capable of controlling the bus connected to it.

The name I2C translates into "Inter IC". Sometimes the bus is called IIC or I²C bus.The original communication speed was defined with a maximum of 100 kbit per second and many applications don't require faster transmissions. Over time there have been several additions to the specification so that there are now 4 operating speed categories.

  • Standard-mode (Sm), with a bit rate up to 100 kbit/s
  • Fast-mode (Fm), with a bit rate up to 400 kbit/s
  • Fast-mode Plus (Fm+), with a bit rate up to 1 Mbit/s
  • High-speed mode (Hs-mode), with a bit rate up to 3.4 Mbit/s.

Features of the I2C-bus:

  • Only two bus lines are required; a serial data line (SDA) and a serial clock line (SCL)
  • Each device connected to the bus is software addressable by a unique address and simple master/ slave relationships exist at all times; masters can operate as master-transmitters or as master-receivers .
  • It’s a true multi-master bus including collision detection and arbitration to prevent data corruption if two or more masters simultaneously initiate data transfer .
  • Serial, 8-bit oriented, bidirectional data transfers can be made at up to 100 kbit/s in the standard mode or up to 400 kbit/s in the fast mode .
  • On-chip filtering rejects spikes on the bus data line to preserve data integrity .
  • The number of ICs that can be connected to the same bus is limited only by a maximum bus capacitance of 400 pF.

Training Objective:

This course is designed to ensure that students of Engineering College with academic capabilities will have the skill set needed to deal with the challenges involved in real-world Embedded Technologies and Device Driver Design to meet the needs of industries both today and in the future.

The course considers programming and device design techniques which can help to ensure that single-processor embedded systems are reliable. 

We cover all the significant changes to Version 2.6 of the Linux kernel, which simplifies many activities, and contains subtle new features that can make a driver both more efficient and more flexible. Trainees will find new topics on important types of drivers not covered otherwise.

The course is taught mainly using the C programming language, System C, hardware design, datasheet interpretition, drivers develpoed on Linux, and a PC emulated as an embedded device.

Pre-requisites:

  • All you need is an understanding of the C programming language and some background in Linux system calls.
  • General understanding about Microprocessors, Operating System Concepts and device drivers is assumed.
  • A prior knowledge or exposure to Linux operating system would be an added advantage.
  • Must have implemented Pseudo driver, character driver, block driver atleast.

Agenda:

  • The Duration of Training is:
    • 8 Classroom Sessions of 2 hrs each.
    • 8 Lab Sessions of 4 hrs each.
  • The course is split into Three sub- modules:
    • Chip Driver
    • Core Module
    • Bus Driver

Training Topics in Brief:

  • Chip driver: a device-dependent part which interacts between user space and the core module.

    • Registering a Chip Driver struct i2c_driver .

    • Check if any I2C devices are on this I2C bus to which the client driver wants to attach.

    • When an I2C chip device is found, the function chip_detect is called by the I2C core.

    • When the I2C chip device is removed from the system, either by the I2C bus driver being unloaded or by the I2C chip driver being unloaded, the I2C core calls the detach_client function specified in the struct i2c_driver structure.

  • Core module: a device-independent part containing an implementation of the I2C protocol.

  • Bus driver: a device-dependent part which interacts between the core module and the actual hardware.

    • An I2C bus driver described by a structure named i2c_adapter .

    • Register the I2C adapter, the driver calls the function i2c_add_adapter.

    • To unregister an I2C adapter, the driver should call the function i2c_del_adapter .

Go to Top ^