EmbLogic's Blog

Time Stamp Counter

Starting with the Pentium, many recent Intel 80×86 microprocessors include a 64-bit Time
Stamp Counter (TSC ) register that can be read by means of the rdtsc assembly language
instruction. This register is a counter that is incremented at each clock signal: if, for instance,
the clock ticks at 400 MHz, the Time Stamp Counter is incremented once every 2.5
nanoseconds.

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