the Linux kernel, clocks “tick” slightly different by than they do in the real world. The time does not progress continually, but in increments of 10 ms (milliseconds) each, which is called a tick. This means that the time virtually stands still between any two ticks. The number of ticks since the system started is recorded in a variable called jiffies in the kernel. The timer interrupt increments the jiffies variable at each interrupt. The terms ticks and jiffies are often used interchangeably.
The resolution frequency of the timer interrupt is initialized to the value of the variable HZ (include/asm/param.h), and it increments the jiffies variable every graphics/035fig01.gif.[4] This length of time is absolutely sufficient for normal applications, because a higher interrupt frequency would only mean a higher load on the system due to too many unnecessary interruptions [RuCo01]. However, there are certain situations where a high timer resolution is required, especially to measure smaller time increments or for running actions at specific points in time [WeRi00]. In networks, you often find such requirements for protocol instances, for example protocol instances that have to calculate packet run times or traffic shapers that have to measure minimum time intervals in the microsecond range.
[4] HZ depends on the architecture: In Alpha processors, HZ = 1024; HZ = 100 in most other architectures.
Most of these tasks require clocks with a resolution that is at least in the microsecond range. For example, to implement a traffic shaper [Tane97], you have to calculate the number of bytes that could be sent within a specific interval. For example, the jiffies time measurement with a resolution of 100 Hz is not suitable. With a rate of 2 Mbits/s, an interval of graphics/035fig02.gif already corresponds to a packet with a length of 2500 bytes.
To avoid this problem, most modern processors (Pentium, Alpha, etc.) have appropriate registers. They have been added to those processors mainly to allow system performance measurements and less for traffic shaping in networks. But, while they are present, their use is quite popular. In the Pentium processor and its successors (and most of its clones), this is a 64-bit-wide TSC (Time Stamp Counter) register; its content is incremented by a value of one in each processor clock. The content of this register shows the number of elapsed clock cycles since system start.
The TSC register is actually nothing more than a hardware variant of jiffies, except that its resolutions is higher by a factor of between 106 and 108. This means, for example, that you can measure intervals with an accuracy of 0.001 ms in a Pentium processor with a clock rate of 1 GHz.
Nevertheless, there is a certain inaccuracy when measuring with the TSC register, because it takes a few clocks (approx. ten) to read the register. The reason is the main memory access that occurs after the register value has been read. It can be done only in the bus frequency, which corresponds to a fraction of the CPU frequency. In addition, there could be effects in the first-level and second-level cache accesses that can easily lead to false measurements. However, the error caused by the TSC register is meaningless for normal measurements, because most of them measure only relatively big time cycles (in the 1-ms range). The command get_cycles() (defined in ) can be used to read the content of the TSC register.
