A logical address consists of two parts: a segment identifier and an offset that specifies the
relative address within the segment. The segment identifier is a 16-bit field called Segment
Selector, while the offset is a 32-bit field.
To make it easy to retrieve segment selectors quickly, the processor provides segmentation
registers whose only purpose is to hold Segment Selectors; these registers are called cs, ss,
ds, es, fs, and gs.
