Nibble
mode is the preferred way of reading 8 bits of data without placing
the port in reverse mode and using the data lines. Nibble mode uses a
Quad 2 line to 1 line multiplexer to read a nibble of data at a time.
Then it "switches" to the other nibble and reads its.
Software can then be used to construct the two nibbles into a byte.
The only disadvantage of this technique is that it is slower. It now
requires a few I/O instructions to read the one byte, and it requires
the use of an external IC.
The
operation of the 74LS157, Quad 2 line to 1 line multiplexer is quite
simple. It simply acts as four switches. When the A/B input is low,
the A inputs are selected. E.g. 1A passes through to 1Y, 2A passes
through to 2Y etc. When the A/B is high, the B inputs are selected.
The Y outputs are connected up to the Parallel Port's status port, in
such a manner that it represents the MSnibble of the status register.
While this is not necessary, it makes the software easier.
To
use this circuit, first we must initialize the multiplexer to switch
either inputs A or B. We will read the LSnibble first, thus we must
place A/B low. The strobe is hardware inverted, thus we must set Bit
0 of the control port to get a low on Pin 1.
Once
the low nibble is selected, we can read the LSnibble from the Status
Port. Take note that the Busy Line is inverted, however we won't
tackle it just yet. We are only interested in the MSnibble of the
result, thus we AND the result with 0xF0, to clear the LSnibble.
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